A Survey on Hardware-aware and Heterogeneous Computing on Multicore Processors and Accelerators

Abstract

The paradigm shift towards multicore technologies is offering a great potential of computational power for scientific and industrial applications. It is, however, posing considerable challenges to software development. This problem is impaired by increasing heterogeneity of hardware platforms on both, processor level, and by adding dedicated accelerators. Performance gains for data- and compute-intensive applications can currently only be achieved by exploiting coarse- and fine-grained parallelism on all system levels, and improved scalability with respect to constantly increasing core counts. A key methodology is hardware-aware computing where in all production steps explicit knowledge of processor, memory, and network details is profitably utilized.

In this work we provide a survey on current multicore and accelerator technologies. We outline architectural features and show, how these features are exposed to the programmer and how they can be beneficially utilized in the application-mapping process. In particular, we characterize the discrepancy to conventional parallel platforms with respect to hierarchical memory sub-systems, fine-grained parallelism on several system levels, and chip- and system-level heterogeneity. We motivate the necessity of hardware-aware computing and summarize the challenges arising from high-performance heterogeneous computing. Furthermore, we investigate the interaction of hardware and application characteristics for selected applications in numerical simulation.